Integrated circuits such as microprocessors, digital signal processors, microcontrollers, memory devices, and the like typically contain millions of Insulated Gate Field Effect Transistors (IGFETs). Because of the desire to increase the speed of the transistors or devices making up the integrated circuits, integrated circuit manufacturers have decreased the device sizes. Although the smaller devices are capable of operating at increased speeds, secondary performance factors such as decreased source-drain breakdown voltage, increased junction capacitance, and instability of the threshold voltage negatively affect transistor performance. Collectively, these adverse performance effects are referred to as short channel effects.
Techniques for increasing device speed have shifted from shrinking device sizes to improving carrier mobility and to mitigating short channel effects. For example, short channel effects can be mitigated by adjusting the electric field in the channel region to minimize the peak lateral electric field of the drain depletion region. One technique for lowering the lateral electric field is to include source and drain extension regions. Another technique suitable for increasing carrier mobility and mitigating short channel effects is to manufacture the devices on a Silicon-On-Insulator (SOI) substrate. Mobility can be further increased by straining the semiconductor devices. A drawback in manufacturing strained semiconductor devices has been the inability to develop large scale manufacturing processes capable of producing semiconductor devices that are under substantially the same amount of strain.
Accordingly, what is needed is a semiconductor device having a predetermined amount of strain and a method for manufacturing the semiconductor device.